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  parameter max. units maximum junction-to-ambient  r ja 50 c/w maximum junction-to-lead r jl 20 c/w thermal resistance irf7807vd2pbf 10/08/04 irf7807vd2r ds (on) 17m ? q g 9.5nc q sw 3.4nc q oss 12nc  device characteristics  so-8 fetky  mosfet / schottky diode top vie w 8 12 3 4 5 6 7 a /s a /s a /s g k/ d k/ d d k/d k/ d ? co-pack n-channel hexfet ? power mosfet and schottky diode ? ideal for synchronous rectifiers in dc-dc converters up to 5a output ? low conduction losses ? low switching losses ? low vf schottky rectifier ? lead-free descriptionthe fetky ? family of co-pack hexfet ? mosfets and schottky diodes offers the designer an innovative, boardspace saving solution for switching regulator and power management applications. hexfet power mosfets utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. combining this technology with international rectifiers low forward drop schottky rectifiers results in an extremely efficient device suitable for use in a wide variety of portable electronics applications. the so-8 has been modified through a customized leadframe for enhanced thermal characteristics. the so- 8 package is designed for vapor phase, infrared or wave soldering techniques. parameter symbol max. units drain-source voltage v ds 30 gate-source voltage v gs 20 continuous drain or source 25c i d 8.3 current (v gs 4.5v) 70c 6.6 a pulsed drain current  i dm 66 power dissipation  25c p d 2.5 70c 1.6 schottky and body diode 25c i f (av) 3.7 a average forwardcurrent  70c 2.3 junction & storage temperature range t j , t stg C55 to 150 c absolute maximum ratings v w www.irf.com 1 pd-95291 downloaded from: http:///
irf7807vd2pbf 2 www.irf.com parameter min ty p max units conditions drain-to-source bv dss 30 C C v v gs = 0v, i d = 250a breakdown voltage static drain-source r ds (on) 17 25 m ? v gs = 4.5v, i d = 7.0a  on resistance gate threshold voltage v gs(th) 1.0 v v ds = v gs ,i d = 250a drain-source leakage i dss 50 a v ds = 24v, v gs = 0 current* 6.0 ma v ds = 24v, v gs = 0, tj = 100c gate-source leakage i gss 100 na v gs = 20v current* total gate charge* q g 9.5 14 v gs =4.5v, i d =7.0a pre-vth q gs1 2.3 gate-source charge v ds = 16v post-vth q gs2 1.0 nc gate-source charge gate to drain charge q gd 2.4 switch chg(q gs2 + q gd ) q sw 3.4 5.2 output charge* q oss 12 16.8 v ds = 16v, v gs = 0 gate resistance r g 2.0 ? turn-on delay time t d (on) 6.3 v dd = 16v, i d = 7.0a rise time t r 1.2 ns v gs = 5v, r g = 2 ? turn-off delay time t d (off) 11 resistive load fall time t f 2.2 electrical characteristics current notes:  repetitive rating; pulse width limited by max. junction temperature.  pulse width 400 s; duty cycle 2%.  when mounted on 1 inch square copper board  50% duty cycle, rectangular   typical values of r ds (on) measured at v gs = 4.5v, q g , q sw and q oss measured at v gs = 5.0v, i f = 7.0a. * device are 100% tested to these parameters. schottky diode & body diode ratings and characteristics parameter min typ max units conditions diode forward voltage v sd 0.54 v t j = 25c, i s = 3.0a, v gs =0v  0.43 t j = 125c, i s = 3.0a, v gs =0v  reverse recovery time trr 36 ns t j = 25c, i s = 7.0a, v ds = 16v reverse recovery charge qrr 41 nc di/dt = 100a/s forward turn-on time t on intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) downloaded from: http:///
irf7807vd2pbf www.irf.com 3 control fet special attention has been given to the power losses in the switching elements of the circuit - q1 and q2.power losses in the high side switch q1, also called the control fet, are impacted by the r ds(on) of the mosfet, but these conduction losses are only about one half of the total losses. power losses in the control switch q1 are given by;p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) () + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? this simplified loss equation includes the terms q gs2 and q oss which are new to power mosfet data sheets. q gs2 is a sub element of traditional gate-source charge that is included in all mosfet data sheets.the importance of splitting this gate-source charge into two sub elements, q gs1 and q gs2 , can be seen from fig 1. q gs2 indicates the charge that must be supplied by the gate driver between the time that the thresholdvoltage has been reached (t1) and the time the drain current rises to i dmax (t2) at which time the drain volt- age begins to change. minimizing q gs2 is a critical fac- tor in reducing switching losses in q1. q oss is the charge that must be supplied to the out- put capacitance of the mosfet during every switch-ing cycle. figure 2 shows how q oss is formed by the parallel combination of the voltage dependant (non- linear) capacitances c ds and c dg when multiplied by the power supply input buss voltage. figure 1: typical mosfet switching waveform synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. power mosfet selection for dc/dcconverters 4 12 drain current gate voltag e drain voltage t3 t2 t1 v gth q gs1 q gs2 q gd t0 downloaded from: http:///
irf7807vd2pbf 4 www.irf.com typical mobile pc application the performance of these new devices has been tested in circuit and correlates well with performance predic- tions generated by the system models. an advantage of this new technology platform is that the mosfets it produces are suitable for both control fet and synchro- nous fet applications. this has been demonstrated with the 3.3v and 5v converters. (fig 3 and fig 4). in these applications the same mosfet irf7807v was used for both the control fet (q1) and the synchronous fet (q2). this provides a highly effective cost/performance solution. figure 3 figure 4 figure 2: q oss characteristic for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be-tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca-pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current .the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. spice model for irf7807v can be downloaded in machine readable format at www.irf.com.  
    
   83 84 85 86 87 88 89 90 91 92 93 12345 load current (a) efficiency (%) vin=24v vin=14v vin=10v 86 87 88 89 90 91 92 93 94 95 12345 load current (a) efficiency (%) vin=24v vin=14v vin=10v downloaded from: http:///
irf7807vd2pbf www.irf.com 5 fig 5. normalized on-resistance vs. temperature fig 7. on-resistance vs. gate voltage -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 4.5v 7.0a fig 8. typical reverse output characteristics fig 7. typical reverse output characteristics 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 v gs, gate -to -source voltage (v) 0.010 0.015 0.020 0.025 0.030 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( ? ) i d = 7.0a 0 0.2 0.4 0.6 0.8 1 v sd , source-to-drain voltage (v) 0 10 20 30 40 50 60 70 i s , s o u r c e - t o - d r a i n c u r r e n t ( a ) 380s pulse width tj = 25c vgs top 4.5v 3.5v 3.0v 2.5v 2.0v bottom 0.0v 0.0 v 0 0.2 0.4 0.6 0.8 1 v sd , source-to-drain voltage (v) 0 10 20 30 40 50 60 70 i s , s o u r c e - t o - d r a i n c u r r e n t ( a ) 380s pulse width tj = 150c vgs top 4.5v 3.5v 3.0v 2.5v 2.0v bottom 0.0v o.ov downloaded from: http:///
irf7807vd2pbf 6 www.irf.com figure 9. maximum effective transient thermal impedance, junction-to-ambient 0.1 1 10 100 0.00001 0.0001 0.001 0.01 0.1 1 10 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thja a p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thja 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 0 2 4 6 8 10 12 0 1 2 3 4 5 q , total gate charge (nc) v , gate-to-source voltage (v) g gs i = d 7.0a v = 16v ds fig 10. typical gate charge vs. gate-to-source voltage downloaded from: http:///
irf7807vd2pbf www.irf.com 7 mosfet , body diode & schottky diode characteristics fig. 12 - typical values of reverse current vs. reverse voltage fig. 11 - typical forward voltage drop characteristics 0.0 0.2 0.4 0.6 0.8 1.0 1.2 forward voltage drop - v sd ( v ) 0.1 1 10 100 i n s t a n t a n e o u s f o r w a r d c u r r e n t - i f ( a ) tj = 125c tj = 25c 0 5 10 15 20 25 30 reverse voltage - v r (v) 0.001 0.01 0.1 1 10 100 r e v e r s e c u r r e n t - i r ( m a ) 125c 100c tj = 150c 75c 50c 25c downloaded from: http:///
irf7807vd2pbf 8 www.irf.com e1 de y b aa1 h k l .189 .1497 0 .013 .050 bas ic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 mi n max mi l l i me t e r s inches mi n max dim 8 e c .0075 .0098 0.19 0.25 .025 bas ic 0.635 basic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 7 k x 45 8x l 8x c y 0.25 [.010] c a b e1 a a1 8x b c 0.10 [.004] 4 3 12 f oot p r i nt 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 4. ou t l i ne conf or ms t o j e de c ou t l i ne ms - 012 aa. not e s : 1. dimens ioning & tolerancing per asme y14.5m-1994. 2. cont r ol l ing dime ns ion: mil l ime t e r 3. dime ns ions are s hown in mil l ime t e rs [inche s ]. 5 dime ns ion doe s not incl u de mol d pr ot ru s ions . 6 dime ns ion doe s not incl u de mol d pr ot ru s ions . mold protrus ions not to exceed 0.25 [.010]. 7 dimension is t he lengt h of lead for soldering to a s ubst rat e. mold protrus ions not to exceed 0.15 [.006]. 8x 1.78 [.07 0] so-8 (fetky) package outline 
   
  rectifier logo int e rnat ional example: t his is an irf 7807d1 (f et ky) xxxx 807d1 y = last digit of the year a = assembly site code ww = week lot code product (optional) p = disgnates lead - free dat e code (yww) part number so-8 (fetky) part marking information downloaded from: http:///
irf7807vd2pbf www.irf.com 9 data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualifications standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 10/04 330.00 (12.992) max. 14.40 ( .566 ) 12.40 ( .488 ) notes : 1. controlling dimension : millimeter. 2. outline conforms to eia-481 & eia-541. feed direction terminal number 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) n otes: 1 . controlling dimension : millimeter. 2 . all dimensions are shown in millimeters(inches). 3 . outline conforms to eia-481 & eia-541. so-8 (fetky) tape and reel 
   
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